Telecom Systems Engineer specializing in Modem Software and Baseband Processors (Qualcomm/MediaTek), Embedded Android, Cellular Protocols (5G, 4G, 3G, and 2G), RIL/IMS, and low-level firmware for embedded systems. Founder and Principal Architect at Haunted Labs, engineering deterministic simulation engines, formal algebraic game grammars, and Model Context Protocol (MCP) agent tooling.
Founded and led by Nilo Edson, Haunted Labs is an independent software architecture studio focused on formal domain-specific language (DSL) design, deterministic combinatorial simulation engines, and autonomous Agentic AI tooling. The studio replaces lossy clickstreams and opaque binary archives with verifiable algebraic representations and high-performance analytical models.
✦ Formal Grammars & RFCs
Pioneered the YGN/YBN Standard (RFC 0001), an algebraic chess-like notation for TCGs delivering 88%–94% compression over raw simulator DOM clickstreams.
✦ Deterministic Simulation
Engineered ygo-sim-core ("Stockfish for Yu-Gi-Oh!"), modeling official Fast Effect Timing state machines, xxHash64 transposition tables, and combinatorial DFS search.
✦ Agentic AI & MCP Integration
Exposing state-space simulation surfaces directly to modern LLM agents via Model Context Protocol (MCP stdio) and automated diagnostics.
Explore the formal charter, four research pillars, and complete systems topology.
The open, human-readable, deterministic algebraic standard for competitive Yu-Gi-Oh! match logs, game state snapshots (YBN), and AI arbitration—modeled after Chess PGN and FEN. Replaces 25 years of bloated browser clickstreams and desynchronizing binary replays.
High-performance deterministic combinatorial simulation and board state valuation engine ("Stockfish for Yu-Gi-Oh!"). Features Stockfish move ordering, greedy link-zone snapping, 20+ step link climbing, xxHash64 zero-collision transposition tables, and stdio Model Context Protocol (MCP) server integration.
Hardened, air-gapped Model Context Protocol (MCP) server delivering zero-hallucination Problem-Solving Card Text (PSCT), 13,000+ card statistics, format banlists, and Genesys point valuations with sub-2ms local execution. Zero outbound HTTP at runtime.
Execution< 2ms (SQLite)
Runtime HTTP0 Requests
Distributionnpm: 14.0 kB
Model Context ProtocolSQLite WALFTS5 SearchAir-GappedZod Schemasnpm Package
Multi-source competitive metagame intelligence and tournament discovery Model Context Protocol (MCP) server. Aggregates live top-cut tournament decks across YGOPRODeck, Yu-Gi-Oh! Meta, and Road of the King, computing sample-weighted Bayesian consensus tier rankings, empirical tech adoption (Main & Side), and immutable tournament decklists with sub-2ms local execution.
ConsensusBayesian Weighted
SourcesYGOPD / YGM / RotK
Distributionnpm: 19.9 kB
Model Context ProtocolBayesian ConsensusSQLite WALMulti-SourceZod Schemasnpm Package
Instituto de Pesquisas Eldorado· June 2022 – Present
Manaus, AM, Brazil
Baseband Stack Integration: Integrated proprietary chipsets and modem firmware (Qualcomm/MediaTek) during Android Core OS upgrades, bridging vendor codebases with Motorola’s custom system architecture.
Low-Level Protocol Debugging: Investigated and resolved timing and synchronization anomalies between application and baseband processors (RIL, IMS, 5G/4G) utilizing C and Java.
GCF/PTCRB Certification: Led modem software compliance and verification, securing strict 3GPP Specification alignment for global products launch programs.
Modem Stability & Ramdump Analysis: Investigated modem silent panics by analyzing post-mortem ramdumps, differentiating consumer and developer crash signatures to isolate, root-cause, and implement critical stability fixes.
Embedded Software Developer (Bare-Metal and Systems)
Instituto Centro de Pesquisa e Desenvolvimento em Tecnologia de Software - Grupo ICTS· Oct. 2021 – May 2022
Manaus, AM, Brazil
Bare-Metal ARM Firmware: Developed high-efficiency bare-metal firmware for STM32 (ARM Cortex-M) microcontrollers, utilizing CMSIS tools and low-level drivers to optimize memory and execution overhead.
Register-Level Integration: Programmed physical communication protocols (I²C, UART, SPI) via direct peripheral manipulation, implementing low-level hardware state machines.
Hardware Abstraction: Authored modular custom C libraries, providing clean, portable HAL components for STM32 targets.
Connectivity Drivers: Built LoRaWAN communication interfaces for ESP32 systems utilizing PlatformIO and AT-command parsing for low-power wireless telemetry.
Research Fellow (Embedded Systems)
Federal University of Amazonas (UFAM)· May 2020 – Sep. 2021
Manaus, AM, Brazil
ARM R&D Collaboration: Co-developed high-performance ARM-based IoT systems in a joint R&D partnership between CETELI/UFAM, Grupo ICTS, and TPV, bridging hardware prototyping with custom low-level firmware.
RTOS Firmware Engineering: Engineered real-time, multi-threaded firmware using FreeRTOS on ARM microcontrollers, managing concurrent safety-critical tasks including battery management systems (BMS) and low-latency audio processing.
Software Developer
INDT (formerly Nokia Institute of Technology)· Apr. 2012 – May 2015
3GPP (5G NR / 4G LTE)I²CUARTSPILoRaWANHIDL / AIDLMQTT
Academic Background
Education & Publications
Faculdade Martha Falcão - Wyden
B.S. in Electrical Engineering
Expected 2027 · Manaus, AM
Federal University of Amazonas (UFAM)
B.S. in Electrical Engineering (Coursework Transferred)
2018 – 2022 · Manaus, AM
Fundação Nokia de Ensino
Technical Degree in Telecommunications
2009 – 2011 · Manaus, AM
Peer-Reviewed IEEE Conference Publications & Research
Sound Pressure Level Measurement System in an Industrial Production Line using STM32 Platform
First Author
2022 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW)
July 2022 · Joint R&D partnership between UFAM (CETELI), TPV Group (Envision), and Grupo ICTS
Developed an edge-embedded C firmware library running directly on STM32 ARM Cortex-M microcontrollers to continuously sample ambient acoustic pressure waveforms, execute A-weighting (dBA) filtering, and compute real-time RMS sound levels on active electronics manufacturing lines.
Design and Implementation of a Software Library for Industrial IoT Sensor/Actuator Nodes
Co-Author · Core Developer
2022 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW)
July 2022 · Joint R&D partnership between UFAM (CETELI), TPV Group (Envision), and Grupo ICTS
Engineered a low-overhead, modular embedded C software library for heterogeneous Industry 4.0 IoT sensor/actuator nodes, standardizing register-level peripheral abstraction (I²C, SPI, UART) and real-time telemetry processing across industrial factory environments.